Utilizing Lattice Distortions to Improve Carrier Mobility in 2D Semiconductors

Utilizing Lattice Distortions to Improve Carrier Mobility in 2D Semiconductors

The researchers’ method: introducing ripples in 2D material, molybdenum disulfide to achieve two orders of magnitude enhancement in carrier mobility at room temperature, allowing electrons to move faster through the material. Credit: Dr. Wu Jing, A*STAR, Institute of Materials Research and Engineering.

Two-dimensional (2D) semiconductors are semiconducting materials with thicknesses on the atomic range, which have outstanding electronic properties. In the future, these materials could have the capacity to substitute silicon in the advancement of numerous electronic and optoelectronic devices.

Regardless of their benefits, the use of 2D semiconductors has so far been restricted, partly because of their reduced carrier mobility at room temperature. This is triggered by an intense spreading of phonons (i.e., quasiparticles related to collective atomic vibrations) in the materials’ lattices.

Researchers at the Agency for Science, Technology and Research (A*STAR) in Singapore and The Hong Kong Polytechnic University in Hong Kong, China, have recently developed a design strategy that could help overcome this constraint, enhancing the carrier mobility of 2D materials. Their proposed technique, detailed in a paper published in Nature Electronics, involves the introduction of lattice distortions in a 2D material utilizing bulged substrates.

“Our paper was inspired by the high carrier mobility observed in 2D TMDs on substrates with high surface roughness by Tao Liu et al. back in 2019,” Dr. Ming Yang and Dr. Jing Wu. Two of the researchers who executed the research, told TechXplore.

“Nevertheless, the observed mobility improvement was simply attributed to strain impacts, and the fundamental mechanism remains unclear. To this end, we dug deeper to discover the underlying physics in charge of such a substantial improvement in mobility and show lattice engineering as a successful approach to produce high-performance electronic devices at room temperature.”

The majority of conventional approaches for improving the carrier mobility of 2D semiconductors depend on attaining ideal lattice structures. The technique suggested by Yang, Wu, and their colleagues, on the other hand, merely entails the introduction of bulged substrates, which develop ripples in a 2D semiconductor and suppress the spreading of phonons.

“We just put 2D materials on substrates with bulged morphologies, producing ripples in the material that results in lattice distortion,” Yang and Wu described. “Commonly, lattice distortions are slated to negatively affect carrier mobility. Nevertheless, we show that such lattice distortions develop a larger electric polarization, which can not only renormalize the frequency of phonons to effectively suppress scattering between electrons and phonons, however likewise enhance the intrinsic dielectric continuous to further screen the polar phonon scattering.”

Contrasted to other existing strategies for increasing carrier mobility in 2D semiconductors, the approach recommended by these researchers is both simple and economical. As part of their study, the team evaluated it on 2D molybdenum disulfide (MoS2) and discovered that it resulted in room temperature carrier mobility of approximately 900 cm2 V − 1 s − 1, which exceeds the predicted phonon-limited mobility of flat MoS2 (ranging between 200 and 410 cm2 V − 1 s − 1).

“The observed mobility enhancement and the underlying mechanism of such high carrier mobility in rippled-MoS2, which surpasses the predicted phonon-limited mobility in flat-MoS2, is especially noteworthy,” Yang and Wu stated. “Such high carrier mobility can lead the way for low-powered electronics and is an important parameter for most applications ranging from field-effect transistors to photodetectors and more.”

The study carried out by this team of researchers highlights the vast capacity of lattice engineering methods to enhance the performance of electronics and thermoelectric devices at room temperature. In the future, their technique could be used to create more efficient devices based upon 2D semiconductors. In addition, it could potentially influence the growth of other design approaches based on lattice engineering.

“In our next studies, we plan to systematically develop rippled/bulged substrates to lessen variability, in addition to research the correlations between lumps,” Yang and Wu added.


More information: Hong Kuan Ng et al, Improving carrier mobility in two-dimensional semiconductors with rippled materials, Nature Electronics (2022). DOI: 10.1038/s41928-022-00777-z

Read the original article on Tech Xplore.

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